| PART |
Description |
Maker |
| MIC2165 MIC2165YMME |
Adaptive On-Time DC-DC Controller Featuring Hyper Light Load
|
Micrel Semiconductor
|
| MIC2104YML MIC2103 MIC2103YML |
75V, Synchronous Buck Controllers featuring Adaptive On-Time Control
|
Micrel Semiconductor
|
| MIC216410 MIC2164-2YMM MIC2164-3YMM MIC2164CYMM MI |
Synchronous Buck Controllers Featuring Adaptive On-Time Control 28V Input, Constant Frequency
|
Micrel Semiconductor
|
| MIC217410 MIC2174-1YMM MIC2174-1YMMTR MIC2174C-1YM |
Synchronous Buck Controller Featuring Adaptive On-Time Control 40V Input, 300kHz
SWITCHING CONTROLLER, 375 kHz SWITCHING FREQ-MAX, PDSO10 LEAD FREE, MSOP-10
|
Micrel Semiconductor, Inc.
|
| BBF2805SE BBF2815S BBF2812S BBF2805SK BBF2803SH BB |
3.3V, 20W DC-DC converter
15V, 20W DC-DC converter
12V, 20W DC-DC converter
Analog IC
18-Mbit (512K x 36/1M x 18) Pipelined SRAM with NoBL™ Architecture
9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL™ Architecture
18-Mbit QDR™-II SRAM 2-Word Burst Architecture
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL™ Architecture
20W DC-DC Converter(输出功率20WDC-DC转换
|
M.S. Kennedy Corp.
M.S. Kennedy Corporation
|
| MT8885AE MT8885AP |
Integrated DTMFTransceiver with Power Down & Adaptive Micro Interface
Integrated DTMFTransceiver with Power Down & Adaptive Micro Interface 综合DTMFTransceiver与掉
|
Mitel Networks Corporat...
Mitel Networks, Corp.
|
| SSM2000S SSM2000P SSM2000 SSM2000-15 |
HUSHStereo Noise Reduction System with Adaptive Threshold
HUSH Stereo Noise Reduction System with Adaptive Threshold
|
Analog Devices, Inc.
|
| CY7C1302DV25-167BZC CY7C1302DV25-167BZI CY7C1302DV |
9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture
9-Mbit Burst of Two Pipelined SRAMs with QDR垄芒 Architecture
9-Mbit Burst of Two Pipelined SRAMs with QDR⑩ Architecture
|
Cypress Semiconductor
|
| CY7C1333 7C1333 CY7C1333-66AC CY7C1333-50AC |
64Kx32 Flow-Thru SRAM with NoBL Architecture(B>NoBL结构4Kx32流通式 SRAM)
64Kx32 Flow-Thru SRAM with NoBL⑩ Architecture
From old datasheet system
|
Cypress Semiconductor Corp.
|
| CY7C1550KV18-450BZC CY7C1550KV18-400BZC CY7C1548KV |
Sync SRAM; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 DDR SRAM, 0.45 ns, PBGA165
72-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
|
Cypress Semiconductor, Corp.
|
| CY7C1315CV18-200BZC CY7C1315CV18-250BZC |
18-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V 512K X 36 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
